Description

The 74HC165D is an 8-bit parallel in/serial out shift register with complementary serial outputs in a 16-pin SOIC package. This high-speed Si-gate CMOS device complies with JEDEC JEDSD 7A. The 74HC165D is pin-compatible with low-power Schottky TTL (LSTTL). When parallel load input is LOW, parallel data from the D0 to D7 inputs are loaded into the register asynchronously. When parallel load input is high, data enters the register serially at DS input and shifts one place to the right with each positive-going clock transition. This feature allows parallel to serial converter expansion by tying Q7 output to the DS input of the succeeding stage. The clock input is a gated OR structure that allows one input to be used as an active low clock enable input. The low to high transition of clock enable input should only take place while clock input is high for predictable operation.

Features:

Supply voltage ranges from 2V to 6V
Synchronous serial input
Asynchronous 8bit parallel load
Features ESD protection
Ambient temperature ranges from -40?C to 125?C

Package Includes:
1 x 74HC165D,653 NEXPERIA Shift Register, HC Family, 74HC165, Parallel to Serial, 1 Element, 8 bit, SOIC, 16 Pins