Dual ARM Cortex-M0+ @ 133MHz 264kB on-chip SRAM in six independent banks Support for up to 16MB of off-chip Flash memory via dedicated QSPI bus DMA controller Fully-connected AHB crossbar Interpolator and integer divider peripherals On-chip programmable LDO to generate the core voltage 2 on-chip PLLs to generate USB and core clocks 30 GPIO pins, 4 of which can be…
